Microkernel-based OS structure
app1 app2 …
file system, memory manager, cpu scheduler: each service in its own address space
m kernel: simple abstraction, address space, IPC
Hardware
Border crossing
– implicit + explicit costs
Protected procedure calls
– 100x normal procedure calls
L3 Mkernel
Thesis: It’s all about efficient implementation
proof by construction to debunk myths about MicroKenerl-based os structure
Strikes Against Microkernel
Kernel-user switches
– border crossing cost
Address space swtiches
– basis for ppc for cross protection domain calls
Thread switches + IPC
– kernel mediation for ppc
Memory effects
– Locality loss
ff <-> storage
Debunking User Kernel Border Crossing Myth
-empirical proof
L3: processor cycles
* includes TLB and cache misses
Mach
– 900 cycles
SPIN and exokernel used mach as locsis for decrying MKernel-based design
Address space swtiches
VPN tag:index – match – TLB:tag PFN – PFN
Large Protection Domain
fs => hardware address space
Large protection domain
– need TLB-flush if not as – tagged
Hardware address space = storage
– explicit cost << implicit cost
e.g., 864 cycles for TLB flush in pentium
upshot for address space switching
small protection domains
large protection domains
Memory effect
VM, memory, L3, L2, L1, CPU TLB
Reasons for Mach's expensive border crossing
- focus on portability
large memory, lesser locality, more cache missing
