CPU
Memory: fast, random access, temporary
Disk: slow, sequential access, durable
CPU Register <- cache -> Main Memory
10 cycle latency, 256 bytes / cycle
Memory Hierarchy
CPU
Main Memory
Write Policy
Hit:
– write-through
– write-back
Miss:
– write-allocate
– no-write allocate
Virtual Address Abstraction
Kernel addresses, user stack, heap, uninitialized data, initialized data, code
